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\subsection{Side-channel attacks}


In a side-channel attack, an attacker obtains secret information by observing or measuring the system
when some critical computation is running.
Side-channel attacks are one of the main problems faced when implementing cryptographic primitives, since
the mathematical security models usually abstract away software, hardware, and implementation details.

In 1999, Kocher et al.~\cite{kocher1999differential} presented two powerful techniques for
side-channel analysis of cryptographic schemes: SPA (simple power analysis) and  DPA (differential power analysis).
Both of these attacks work by measuring the power trace of a system when it is performing some cryptographic computation.
When performing an SPA, the attacker tries to recover some secret information by directly interpreting the
power trace. In contrast, in a DPA, the attacker uses statistical analysis to correlate the power
consumption to the data processed. As such, DPA can better eliminate noise in the measurements.
Power analysis has been used to attack
widely used schemes such as AES~\cite{mangard2002simple},
RSA~\cite{messerges1999power}, and Elliptic Curves~\cite{coron1999resistance}.

The main limitation of the attacks mentioned above is that direct access to the hardware is needed to
perform the measurements. Therefore, it makes them less practical than side-channel attacks based on timing~\cite{kocher1999differential} or cache~\cite{yarom2014flush+,gruss2016flush+}.
There are some examples of power analysis attacks that do not use dedicated hardware against
mobile devices~\cite{michalevsky2015powerspy,yan2015study}, where the power information is
obtained by monitoring the device's battery.

Closely related to our research is the work by Mantel et al.~\cite{mantel2018secure} that
shows, to the best of our knowledge, the first energy consumption side-channel attack using
the software-based measurements provided by the RAPL interface. In this work, the
authors mount a key distinguishing attack against a popular implementation of the RSA cryptosystem.
The authors reported that, with only 25 energy consumption observations, an attacker can distinguish
between two RSA keys with 99\% of success.


\subsection{Covert channels}

One of the first covert channels related to power usage was introduced in 2006 by Murdoch~\cite{murdoch2006hot}.
In this work, the Trojan, running on a server,
modulates a message as the usage of a device to heat it up or cool it down. The spy then
recovers the message by observing the clock skew on timestamps of the collected responses from the server
that were caused by differences in temperature.
The capacity of Murdoch's channel was later estimated as 20.5 bph (bits per hour) by Zander et
al.~\cite{zander2011capacity}.


In 2015, two covert channels directly based on power consumption and measurement were
proposed. Guri et al.~\cite{guri2015} showed a covert channel achieving between 1 and 8 bph
between two separated desktop computers, where the Trojan modulates the heat dissipation, and the spy decodes the message using its hardware's native heat sensors.
In 2015, Masti et al~\cite{masti2015thermal} showed how to use the CPU core temperature
measurements to build a covert channel. One very interesting property of this covert
channel is that it can transmit information between applications running in two
different cores because the temperature in one core (which runs the Trojan), affects the
temperature of the cores close to it (which may be running the spy). Their channel implementation
achieves a throughput of up to 12.5 bps. Their result was improved to 50 bps
by Bartolini et al.~\cite{bartolini2016capacity}, and latter by Long et al.~\cite{long2018improving}
to 160 bps with close to 0\% error rate, and 600 bps with around 15\% error rate.


In 2018, Miedl and Thiele~\cite{miedl2018security}
presented the first construction of a covert channel based on the processor's
power consumption. Their channel implementation is completely based on the CPU power consumption.
They considered two
platforms for their experiments: a Lenovo notebook with an Intel Core i7 quad-core processor, and
server rack based on an Intel Xeon octa-core. Surprisingly, for their channel implementation,
the power covert channel showed a lower error rate when running in the notebook than in the server.
Using the notebook, the channel achieved 1000 bps with an error rate of a little less
than 15\%.
Miedl and Thiele~\cite{miedl2018security} did not consider the RAPL registers for the DRAM power
when building the covert channels.
